Abstract
Embedded, continual learning for autonomous and adaptive behavior is a key application of neuromorphic hardware. However, neuromorphic implementations of embedded learning at large scales that are both flexible and efficient have been hindered by a lack of a suitable algorithmic framework. As a result, most neuromorphic hardware are trained off-line on large clusters of dedicated processors or GPUs and transferred post hoc to the device. We address this by introducing the neural and synaptic array transceiver (NSAT), a neuromorphic computational framework facilitating flexible and efficient embedded learning by matching algorithmic requirements and neural and synaptic dynamics. NSAT supports event-driven supervised, unsupervised and reinforcement learning algorithms including deep learning. We demonstrate the NSAT in a wide range of tasks, including the simulation of Mihalas-Niebur neuron, dynamic neural fields, event-driven random back-propagation for event-based deep learning, event-based contrastive divergence for unsupervised learning, and voltage-based learning rules for sequence learning. We anticipate that this contribution will establish the foundation for a new generation of devices enabling adaptive mobile systems, wearable devices, and robots with data-driven autonomy.
Highlights
Using biological brains as an inspiration for designing novel computing paradigms can lead to massively distributed computing technologies that operate on extremely tight power budgets [92], while being robust to ambiguities in real-world sensory information and resilient to component failures [39]
This organization can overcome some of the fundamental inefficiencies of the Von Neumann architecture [8] when scaled to massively distributed systems. To deploy such an architecture on real-world workloads, neuromorphic systems necessitate a suitable computational and learning framework that can efficiently operate within the constraints dictated by the architecture and dynamics of the neural substrate, i.e. that states and parameters local to the neuron, and global communication is mediated by all-or-none events which are sparse in space and time
Recent progress has significantly advanced the systematic synthesis of dynamical systems onto neural substrates and their neuromorphic VLSI counterparts, their applications continue to rely on off-line and off-device learning [29, 48], calibration techniques [34, 56, 65], or dedicated digital processors [1, 73] that cannot be directly and efficiently embedded in neuromorphic hardware
Summary
Using biological brains as an inspiration for designing novel computing paradigms can lead to massively distributed computing technologies that operate on extremely tight power budgets [92], while being robust to ambiguities in real-world sensory information and resilient to component failures [39] To devise such technology, neuromorphic electronic systems strive to closely mimic the building blocks of biological neural networks and dynamics [55] in custom digital [57, 37] or mixed signal [83, 11, 76] CMOS technologies. For many industrial applications involving controlled environments, where existing (labeled) data is readily available or where streaming data can be quickly transmitted to a mainframe computer, such off-line learning or calibration techniques are acceptable Following this approach, many academic and industrial research groups have successfully demonstrated dedicated hardware for inference tasks [16, 40, 58]. Recent work on neuromorphic systems can potentially achieve this feat with a thousandfold less power than GPUs [69, 70], while matching or surpassing the accuracy of dedicated machine learning accelerators [16, 40], and operating on-line
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