Negative Capacitance Transistors

Abstract

In recent years, the negative capacitance effect in ferroelectric (FE) materials has attracted significant attention from many researchers around the world. The negative capacitance effect promises to reduce the voltage requirement in conventional complementary metal–oxide–semiconductor transistors below what is otherwise believed to be the Boltzmann limit. In this paper, our objective is to discuss the fundamental underpinning of the negative capacitance effect and describe how it can be utilized for transistors. We shall start with a thermodynamic perspective to understand where the reduction in energy dissipation comes from. We then proceed to derive the S curve in an FE material from fundamental principles. The central result of this paper is to associate the negative slope region in the S curve to a physically definable configuration of dipoles in the crystal structure. The design of a negative capacitance transistor is essentially an exercise of stabilizing the FE in the negative slope region of the S curve using the semiconductor capacitance as a series capacitor.