Abstract
After application in thin-film silicon tandem solar cells and in lab-scale silicon heterojunction (SHJ) devices, doped nanocrystalline silicon (nc) layers now arrived on the industrial stage. Despite their challenging deposition, the benefits they hold with respect to even higher device performance compared to their amorphous counterparts are significant and justify additional effort. In this contribution we report on developments towards industrially applicable processes for n- and p-doped silicon layers, nc-Si(n) and nc-Si(p), and their implementation in SHJ cells. Our investigation focuses on the impact of deposition temperature (Tdep) and the need for a thin oxide layer to promote fast nucleation of thin, sufficiently crystalline, doped nc-Si films in a single deposition chamber powered at 13.56 MHz. We identified main challenges for thin film and contact engineering and reached efficiencies of 23.0% with n- and 23.1% with p-type nc-Si approaching cell performances of our process of record based on amorphous Si (a-Si) layers.
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