N-Channel GaAs MOSFET with TaN ∕ HfAlO Gate Stack Formed Using In Situ Vacuum Anneal and Silane Passivation

Abstract

A surface passivation technique for GaAs that comprises in situ vacuum anneal and silane treatment and that is compatible and can be easily integrated with a matured metallorganic chemical vapor deposition high- gate dielectric process module is demonstrated. Extensive investigation of the dependence of electrical characteristics of gate stacks on process conditions, including in situ vacuum anneal and treatment temperatures, postgate-dielectric deposition anneal, and forming gas anneal conditions, is reported. It is shown that excellent capacitance-voltage characteristics with low-frequency dispersion, small hysteresis, and low midgap interface state density of can be achieved with optimum processing conditions. The passivation technique reported here enables the fabrication of a self-aligned n–metal oxide semiconductor field-effect transistor, exhibiting good transfer characteristics with high peak carrier mobility of . The incorporation of and coimplantation for achievement of high dopant activation in deep source and drain (S/D) regions and complementary metal oxide semiconductor compatible gold-free–based PdGe S/D ohmic contacts were also demonstrated.