Abstract
This Paper elucidate the development of SOI-MOSFET using different gates like single, double, triple and gate all around structures. It is the Si MOSFET that is a fundamental device in the development of very high density Integrated Circuits. Thus SOI Technology is used for reducing the Parasitic Capacitances. Improvement in the electrostatic control by gate of the channel is done with the increase in effective number of gates. It minimizes short-channel effect which arises due to the lines of electric field from source and drain affecting control of the channel region. The technologies like Double-gate (top and bottom gate) SOI MOSFET and the Gate-all-Around (GAA) helps to suppress various short channel effects like Drain-Induced Barrier Lowering (DIBL) and degradation in Subthreshold slope. Nano MOSFETs are now the requirements of nano electronics and it is the Gate-all-Around MOSFET which is employed in silicon Nano wires.
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