MOS Capacitor Evaluation of Deep States at the Interfacial Grain Boundary in (110/100) Bonded Silicon

Abstract

Three different characterization structures of MOS capacitor: Homo orientation, Hybrid orientation and hybrid orientation with shallow grain boundary were applied to evaluate the deep states at (110/100) grain boundary. With multiple frequency C-V and G-V measurements from our unique HOMO and HOT structures, a complex equivalent circuit model of MOS capacitor on bonded wafer was proposed and fitted. With this non-destructive characterization approach, charge density at deep grain boundary became accessible. Moreover, the Continuum of interface trap density at grain boundary, ranged from 0.3 eV below mid-gap to 0.16 eV above mid-gap was completed by applying designed HOT MOS capacitor with shallow grain boundary. This accomplishment is leading us toward further studies on deep state of grain boundaries playing key roles in real device.