Abstract
ABSTRACTVertical stacking of transistors is a promising technology which can realize compact and high-speed integrated circuits (ICs) with a short interconnect delay and increased functionality. Two layers of low-temperature fabricated single-grain thin-film transistors (SG TFTs) have been monolithically integrated. NMOS mobilities are 565 and 393 cm2/Vs and pMOS mobilities are 159 and 141 cm2/Vs, for the top and bottom layers respectively. A three-dimensional (3D) inverter has also been fabricated, with one transistor on the bottom layer and the other on the top layer. The inverters showed an output voltage swing of 0 to 5 V with a switching voltage of around 2 V.
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