Abstract

Substrate noise coupling caused by digital switching activity on a mixed-signal IC can severely disturb RF circuits on such IC. The authors have developed an accurate approach to predict and model, prior to processing, the substrate noise generation, propagation and resulting analog and RF performance degradation. Measurements on a mixed-signal IC that contains a digital data path (40 K-gates) and an LC-VCO in a 0.18/spl mu/m CMOS process on a lightly-doped substrate, demonstrated that it is possible to understand the mechanisms of substrate noise impact and to accurately predict noise suppression by isolation techniques (a p+/n-well guard ring structure for the test case).

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