Abstract
Shielded coplanar waveguides (S-CPW) are promising candidates for the development of high-quality factor transmission lines in millimetre-wave frequency bands, from about 10 GHz to more than 65 GHz. In this paper, state-of-the art experimental results carried out on a CMOS 0.35 µm low-cost technology are first presented. These results open new possibilities for the development of low-loss compact passive circuits. Then, an accurate and simple modeling approach, based on the simulation of classical and grounded CPW transmission lines, is carried out in order to minimize the simulation time and computer memory need. Thus, very fast design procedures are obtained. Lastly, the size reduction of shielded CPW is addressed. It is demonstrated that shielded S-CPW structure leads to a chip area, for a same electrical length, divided by 2 compared to classical microstrip or CPW transmission lines.
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