Low-power wiring method in CMOS logics circuits by segmentation coding and pseudo majority voting

Abstract

It is strongly demanded to reduce power consumption in wiring such as data bus of Complementary Metal Oxide Semiconductor (CMOS) logic circuits, especially used in mobile devices. The power consumption in CMOS is proportional to transition rate between `0' and `1' of each bit, and a lot of methods to reduce the transition rate have been proposed. On the other hand, in band-limited data, such as audio data, the transition rate in the upper bits is usually smaller than that of the lower bits. This paper proposes a new data encoding method that takes advantage of this property to reduce the transition rate better than conventional ones. In the proposed method, upper and lower bits are encoded by different method to make the transition rate small in the each group. Although conventional majority voting method is used to encode the lower-bit group, its circuit size is smaller than conventional ones, since smaller number of bits are encoded than conventional ones. This paper proposes a pseudo majority voting method to reduce its circuit size furthermore. The computer simulation shows the effectiveness of the proposed method. The proposed method is also implemented on a printed circuits board (PCB) by using generic CMOS logic ICs, and its experimental results also show the effectiveness of the proposed method.