Abstract
AbstractFine-grain Dynamic Voltage and Frequency Scaling (DVFS) is becoming a requirement on Globally-Asynchronous Locally-Synchronous (GALS) architectures to ensure low power consumption of the whole chip. Each voltage/frequency island is driven by a voltage and a frequency “actuators”. However, due to process variability that naturally appears with technology scaling, the actuator design must be robust. Moreover, due to area constraints, the control law must be as simple as possible. Last but not least, response time constraints require these controllers to be implemented in hardware. In this paper, the design of a low-cost control law for a full Digital FLL in the context of GALS architecture, in presence of process variability and temperature variations has been proposed. The system has been first modelled, especially, the delay that naturally arises in the sensor has been taken into account. The FLL control has been done with classical control tools. The control problem is original by its hardware implementation that has been done in fixed-point arithmetic. The FLL has been implemented in a GALS chip.
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