Live demonstration: Programmable vision chip with neighborhood level parallel processing

Abstract

This live demonstration features a vision chip based on a neighborhood level parallel processing paradigm. Processors are physically embedded within groups of pixels, complete with memory and algorithmic capabilities controlled by a custom instruction set. This results in a scalable resolution, parallel processing vision chip with flexible programmability that can perform a wide variety of image and video processing tasks. A prototype vision chip has been fabricated in a 0.13μm CMOS technology consisting of an 8×10 array of processors with a 64×80 resolution. The setup demonstrates how the vision chip can execute various parallel processing programs and manipulate image acquisition parameters to match the requirements of a scene in real-time.