Abstract
Three dimensional (3D) chip or wafer stacking and through silicon via (TSV) technologies are regarded as key technologies for next generation high-speed memories and microprocessors. In comparison to conventional chip technologies, three dimensional electrical networks allow much shorter wire lengths. This allows higher frequencies, less power consumption and smaller devices. A main technology to realise through silicon vias is laser drilling. Using laser drilling instead of deep reactive ion etching or the Bosch process makes masks unnecessary and thus allows great flexibility and lower costs. Today, vias with diameters of 10-80 mum are possible and can be laser drilled at speeds of about 2000 vias/s. However, laser drilling technology causes damages to the surrounding single-crystalline silicon. The paper surveys existing methods for defect structure analysis and evaluates them concerning their suitability for analysis of silicon TSV wafers. White beam X-ray topography at the synchrotron radiation source ANKA, Research Centre Karlsruhe, was selected as the best non-destructive method. For this paper three different laser types with normal (ns), short (ps) and ultra-short (fs) pulse width with varying parameter sets were used to drill TSVs into silicon wafers. For the first time, large area and section transmission topography were used to measure the strain affected zone around the TSVs. On the basis of these measurements femtosecond lasers were identified as superior to laser with longer pulse widths. The methodology presented in this paper is well suited for continuing studies with UV lasers and miniaturised vias, while at the same time electrical measurements become essential to finally answer how this affects the circuit performance of transistors, capacitors etc. adjacent to the through silicon vias.
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