Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels

Abstract

This paper is focused on the study of the noise performance of 65 nm CMOS transistors at extremely high total ionizing dose (TID) levels of the order of several hundreds of Mrad(SiO2). Noise measurements are reported and discussed, analyzing radiation effects on $1/f$ noise and channel thermal noise. In nMOSFETs, up to 10 Mrad(SiO2), the experimental behavior is consistent with a damage mechanism mainly associated with lateral isolation oxides, and can be modeled by parasitic transistors turning on after irradiation and contributing to the total noise of the device. At very high dose, these parasitic transistors tend to be turned off by negative charge accumulating in interface states and compensating radiation-induced positive charge building up inside thick isolation oxides. Effects associated with ionization and hydrogen transport in spacer oxides may become dominant at 600 Mrad(SiO2) and may explain the observed noise behavior at extremely high TID. The results of this analysis provide an understanding of noise degradation effects in analog front-end circuits integrated in readout chips for pixel detectors operating in very harsh radiation environments such as the High-Luminosity Large Hadron Collider.