(Invited) Atomic Layer Neutral Beam Processes for Nanofabrication and Interface Engineering

Abstract

Introduction In the fabrication of semiconductor devices, reactive plasmas are widely used in key processes such as microfabrication, surface modification and film deposition, and there are now demands for processing precision at the atomic layer level, and for deposition accuracy that allows the control of structures at the molecular level. However, in ultra-miniature nanoscale devices that will become the mainstream in the future, the use of plasma processes can cause serious problems such as breakdown of insulation films by the accumulation of ions or electrons emitted from the plasma and the formation of surface defects (dangling bond) of over a few tens nm in depth by exposure to ultraviolet (UV) emissions from the plasma.1,2) In particular, since nano-scale devices have a larger surface area compared with the bulk material, plasma processes can have a large influence on the electrical and optical properties of devices due to process-induced defects caused by ultraviolet exposure, since future nano-devices will require size control of three-dimensional structures at the atomic layer level, it will be absolutely essential to control surface chemical reactions with high precision and selectivity at the atomic layer level.To achieve charge-free and UV photon irradiation damage-free processes, we have developed a new neutral beam generation system based on my discovery that neutral beams can be efficiently generated from the acceleration of negative ions produced in pulsed plasmas. This paper introduce the neutral beam generation technique and discusses its application to atomic layer etching (ALE), modification (ALM) and deposition (ALD) that have recently been pursued.3,4) Neutral Beam Source and Its Applications for Nano-devices Our proposed neutral beam source3) has evolved from the pulse modulated plasma with an on/off switching time of 50 microseconds (Fig.1). This source uses an inductively coupled plasma (ICP) source, and has carbon ion acceleration electrodes situated at the top and bottom of the quartz plasma chamber. Gas is introduced from the upper electrode in the form of a shower, and ions accelerated from the plasma pass through apertures formed in the lower graphite carbon electrode, where ions are neutralized and UV photons are perfectly absorbed by colliding with the aperture sidewalls. We found that a neutral beam formed by the neutralization of mainly negative ions using a pulse-modulated plasma is able to form a neutral beam with higher density and lower energy. Using the neutral beam processing, for the first time, we successfully demonstrated damage-free ALE, damage-free ultra-thin gate dielectric film/low dielectric film ALDs for sub-10 nm Fin-FETs (Fig.1), transition metal oxidation for ReRAM, damage-free ALE of magnetic materials for MRAM, damage-free InGaN ALE for micro-LED, damage-free ALM of 2D materials and ALE/ALM of superconducting materials for quantum computer.3,4) Conclusions This paper has reviewed our research into cutting-edge nanodevices using the neutral beams. In the advanced nano-devices of the future, it will be essential to use ideal surface chemical reactions that do not cause surface/interface defects and can be controlled at the atomic layer level. The neutral beam process is an intelligent nano-process that completely suppresses the UV rays and electrical charges emitted from a plasma, and is thus able to achieve ideal surface atomic layer reactions in agreement with the computational analysis. We are currently studying how to apply this technique forming ultra-thin films and reforming (etching and modification) the surface of semiconductor/metal/dielectric materials, and we hope that this technique will make a large contribution to the development and implementation of new nanodevices in the future. References 1).T. Nozawa and T. Kinoshita: Jpn. J. Appl. Phys. vol.34 (1995)pp. 2107.2).Mitsuru Okigawa, Yasushi Ishikawa, Yoshinori Ichihashi and Seiji Samukawa, J. Vac. Sci. and Technol. B, vol.22, No.6 (2004) pp.2818.3).Seiji Samukawa, IEEE Nanotechnology Magazine, vol.13, No.6(2019) pp.21.4).Kexiong Zhang, Tokio Takahashi, Daisuke Ohori, Guangwei Cong, Kazuhiko Endo, Naoto Kumagai, Seiji Samukawa, Mitsuaki Shimizu and Xuelun Wang, Semiconductor Science and Technology, vol.35(2020) pp.075001. Figure 1