Abstract
The paper represents the results of the investigation of the complex Digital Signal Processing algorithm for the processing of the measurement signals of the Settling Time Measurement of the Digital-to-Analog Converters. The results of the investigations show that the obtained results ensure suppression of the white noise and 1/f noise by up to 100 times and it is possible to measure settling times of up to 16 bit high-speed DACs with readout levels of ± 0.5 LSB while measurement errors not exceed ± 0.6 ns.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.