Interpretation of gap states for polycrystalline silicon vertical thin film transistors

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Abstract Polycrystalline silicon vertical thin film transistors (VTFTs) were fabricated employing a five-mask process. The electrical characterization was carried out to elucidate physical parameters, especially threshold voltage and effective mobility. The gap density of states (DOS) of VTFT was analyzed using the field effect method, whereas deep states and tail states were fitted by Gaussian and exponential distributions, respectively. Grain boundary barrier height was calculated using an analytic method. At the same time, the activation energy of thermionic emission through grain boundary was also introduced to show the accuracy of the calculation. In addition, lateral polycrystalline silicon thin film transistor (LTFT) was also analyzed and compared to show the grain boundary barrier heights and difference in gap states.