Inter: An inexpensive inter-procedural register allocator

Abstract

Traditionally general-purpose architectures include few registers (8–16) which could easily be utilized by conventional (global) register allocation. Recently designed architectures require the compiler to utilize significantly more registers (⩾ 32). Exploitation of these larger sets by the compiler requires advanced register-allocation strategies. This paper describes inter, a register allocator which utilizes an interprocedural strategy to achieve excellent register-file utilizations.