Influence of quantum confinement effects over device performance in circular and elliptical silicon nanowire transistors

Abstract

This work reveals the impact of quantum mechanical effects on the device performancce of n-type silicon nanowire transistors (NWT). Here we present results for two Si NWTs with circular and elliptical cross-section. Additionally we designed both devices to have identical cross-section in order to provide fair comparison. Also we extended our discussions by reporting devices with five different gate lengths for both circular and elliptical nanowires. Our calculations gave us the opportunity to establish a link between the charge distribution in the channel, gate capacitance, drain induced barrier lowering (DIBL) and the sub-threshold slope (SS). We also performed two types of calculations considering two different theoretical approaches. First one is based on drift-diffusion (DD) without quantum correction. The second one is constructed on quantum mechanical (QM) description of the mobile charge distribution in the channel. The QM methodology is based on Schrodinger equation. More importantly, in this work showw that capturing the QM effects is mandatory for nanowires with such ultra-scale dimensions.