Abstract

The phase locked loop (PLL) bandwidth suffers a dilemma on carrier phase accuracy and dynamic stress tolerance in stand-alone global navigation satellite systems (GNSS) receivers. With inertial navigation system (INS) aiding, PLLs only need to tolerate aiding information error, instead of dynamic stress. To obtain accurate carrier phase under high dynamics, INS-aided PLLs need be optimally designed to reduce the impact of aiding information error. Typical micro-electro-mechanical systems (MEMS) INS-aided PLLs are implemented and tested under high dynamics. Tests using simulation show there is a step change in the aiding information at each integer second, which deteriorates the carrier phase accuracy. An improved structure of INS-aided PLLs is proposed to eliminate the step change impact. Even when the jerk is 2000 m/s3, the tracking error of the proposed INS-aided PLL is no more than 3°. Finally, the performances of stand-alone PLLs and INS-aided PLLs are compared using field tests. When the antenna jerk is 300 m/s3, the carrier phase error from the stand-alone PLLs significantly increased, while the carrier phase error from the MEMS INS-aided PLLs almost remained the same. Therefore, the proposed INS-aided PLLs can suppress tracking errors caused by noise and dynamic stress simultaneously under high dynamics.

Highlights

  • With the development of global navigation satellite systems (GNSS), precision positioning is gradually being applied in dynamic environments, including mobile mapping, autonomous driving, seismic surveying, precision weapon guidance, and other areas [1,2,3,4]

  • Typical mechanical systems (MEMS) inertial navigation system (INS)-aided phase locked loop (PLL) were implemented in our software GNSS/INS deeply-coupled system, and tracking errors caused by aiding information were tested and analyzed under a jerk of 2000 m/s3 using hardware simulator

  • To obtain accurate carrier phase for GNSS precision positioning under dynamics, we focused on improving the design of MEMS INS-aided PLLs

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Summary

Introduction

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