Improved Short-Circuit Ruggedness for 1.2kV 4H-SiC MOSFET Using a Deep P-Well Implemented by Channeling Implantation

Abstract

The trade-off relationship between specific on-resistance and short-circuit withstand time in 1.2 kV 4H-SiC MOSFETs was drastically increased using a novel device structure. MOSFETs with deep P-well-formed using channeling implantation were firstly demonstrated to improve short-circuit ruggedness (&#x007E;4 times longer than conventional MOSFET) with no negative impact on specific on-resistance. Proposed MOSFETs achieved short-circuit withstand time of <inline-formula> <tex-math notation="LaTeX">$8~\mu \text{s}$ </tex-math></inline-formula>. Channeling implant with low energy was conducted to form deep P-well junctions. Fabrication of a deep P-well using channeling implantation is demonstrated using no additional nor complicated processes when compared to the conventional MOSFET fabrication process. A comparison between the conventional and novel designs was performed in terms of the output characteristics, blocking behaviors, and short-circuit ruggedness.