Abstract
The generalized integrated interleaved (GII) codes can nest BCH sub-codewords to form more powerful BCH codewords. GII codes enable hyper-speed decoding and achieve excellent error-correction capability. They are among the best candidates for the new storage class memories (SCMs). However, SCMs require high code rate and short codeword length. In this case, the GII sub-codewords have small correction capability, and miscorrections on the sub-words lead to severe performance degradation. In previous work, higher-order nested syndromes are computed to detect and mitigate miscorrections in GII decoding. These computations cause long decoding latency, even though they can be implemented by sharing the hardware architecture for other decoding steps. This paper proposes three methods to optimize the miscorrection detection by investigating dominant error patterns leading to miscorrections. The first scheme is to skip the nested syndrome checking for cases that are less likely miscorrected. To make up for the performance loss caused by the first scheme, our second approach exploits 2-bit extended BCH codes to protect each sub-codeword. In addition, the third scheme is developed to protect all sub-codewords using extra parity bits while keeping the code rate loss negligible. Formulas are also derived to estimate the achievable performance. Applying the proposed optimizations, the average nested decoding latency is reduced by 43% for an example GII code with 3-error-correcting sub-codewords at input bit error rate 10<sup>−3</sup>, while the performance loss and complexity overheads are negligible.
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