Abstract
In this paper a simple abstract machine for the translation of FP programs is suggested. The machine simply consists of an instruction selection register (ISR), a pipeline control register (PCR) and a large collection of general purpose registers. It is illustrated how the FP structures may directly be mapped on the ISR and executed. Although the main purpose of the abstract machine was to simplify the translation of FP programs, it is shown that the suggested machine may as well be used to extend RISC instruction sets in a proper healthy way. This will have the effect of simplifying the translation of procedural programs written in any other language. The dynamic nature of the FP combining forms makes it possible to tailor any sort of intermediate instruction suitable for the particular application. The machine may either be implemented at the macro-assembler level or at the firmware level using efficient microcode.
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