Implementation of High Speed and Low Power CAM with ML Sensing Amplifier

Abstract

Content addressable memory (CAM), is a peculiar type of memory device and it is employed in high speed execution. Main feature of CAM Includes Pipelining in which it can search overall memory during a single click cycle. Unlike RAM, it's much faster altogether search executions due to its pipelining nature, but it demands quite high power consumption. Therefore, a high speed and low power Matched line sensing Amplifiers (MLSA) are extremely coveted for the designing of an effective CAM. The Simulation results using Cadence tool shows that the Parity bit technique is best suited to reduce the time delay by 60.36%. A closed loop feedback is introduced in Power Gated ML Sensing Amplifier to prevent the power being consumed further, thereby diminishing the power consumption by 49.81%. The designed CAM is commonly used in real time applications like look-up tables, databases, and, with this improved power and delay functions, these executions become appreciably worthwhile.