Abstract

Passivating contacts are becoming a mainstream option in current photovoltaic industry due to their ability to provide an outstanding surface passivation along with a good conductivity for carrier collection. However, their integration usually requires long annealing steps which are not desirable in industry. In this work we study PECVD as a way to carry out all deposition steps: silicon oxide (SiOx), doped polycrystalline silicon (poly-Si) and silicon nitride (SiNx:H), followed by a single firing step. Blistering of the poly-Si layer has been avoided by depositing (p+) microcrystalline silicon (μc-Si:H). We report on the impact of this deposition step on the SiOx layer deposited by PECVD, and on the passivation properties by comparing PECVD and wet-chemical oxide in this hole-selective passivating contact stack. We have reached iVoc > 690 mV on p-type FZ wafers for wet-chemical SiOx\(p+) μc-Si\SiNx:H with no annealing step.

Highlights

  • Crystalline silicon solar cell is the dominant technology in today’s photovoltaic (PV) market

  • In this work we study PECVD as a way to carry out all deposition steps: silicon oxide (SiOx), doped polycrystalline silicon and silicon nitride (SiNx:H), followed by a single firing step

  • We report on the impact of this deposition step on the SiOx layer deposited by PECVD, and on the passivation properties by comparing PECVD and wet-chemical oxide in this hole-selective passivating contact stack

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Summary

Introduction

Crystalline silicon solar cell is the dominant technology in today’s photovoltaic (PV) market. In order to foster PV development and make it economically more competitive, it is necessary to further reduce production costs as well as to increase cell efficiencies. The integration of so-called passivating contacts is a mainstream option [1,2,3]: they consist of a silicon oxide (SiOx)\ doped polycrystalline silicon (poly-Si) stack that allows an outstanding surface passivation while providing a low series resistance and higher conductivity than doped a-Si:H. As for cost reduction, the main option is to reduce the number of processing steps. Ingenito et al use a single firing step to both contact and anneal the cell, while limiting the overall thermal budget applied to the silicon wafer [4]. SiOx and doped poly-Si layers can be deposited sequentially by PECVD [5]

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