Hiperti: high performance system for cross-platform code generation of transformer model inference based on MLIR

This chapter describes the basic functions and features of the simulation software PSIM. Through a grid‐link inverter system example, it illustrates how to set up the power and control circuits, and how to convert analog controllers to digital controllers. The chapter shows how to prepare the system for automatic code generation and processor‐in‐the‐loop (PIL) simulation with Texas Instruments F28335 DSP. PSIM is simulation software specifically designed for power electronics, motor drives, and power conversion systems. In PSIM, a circuit is represented in four parts: power circuit, control circuit, sensors, and switch controllers. With the basic understanding of the DSP hardware and the PSIM hardware target library, one will be in a position to modify the grid‐link inverter system for automatic code generation. If one chooses to write the DSP code manually, PSIM provides a way to validate the code through PIL simulation with minimum change to the original code.

Programming is a powerful and ubiquitous problem-solving tool. Systems that can assist programmers or even generate programs themselves could make programming more productive and accessible. Recent transformer-based neural network models show impressive code generation abilities yet still perform poorly on more complex tasks requiring problem-solving skills, such as competitive programming problems. Here, we introduce AlphaCode, a system for code generation that achieved an average ranking in the top 54.3% in simulated evaluations on recent programming competitions on the Codeforces platform. AlphaCode solves problems by generating millions of diverse programs using specially trained transformer-based networks and then filtering and clustering those programs to a maximum of just 10 submissions. This result marks the first time an artificial intelligence system has performed competitively in programming competitions.

An investigation on the nature of decision support system software

Programmable Logic Controllers (PLCs) are fundamental to industrial automation systems. However, traditional PLC programming requires extensive domain expertise and significant time investment, while code reusability remains limited and cross-platform adaptation poses substantial challenges. With the rapid advancement of Large Language Models (LLMs), LLM-based code generation offers a promising approach to address these issues. Nevertheless, existing methods still face challenges when handling complex industrial scenarios, including insufficient domain knowledge, unstable code quality, and weak cross-platform adaptation capabilities. This paper presents a multi-agent system for intelligent cross-platform PLC code generation, featuring a collaborative framework consisting of four specialized agents: requirement analysis, architecture design, code generation, and verification-optimization. The method injects domain knowledge through a Retrieval-Augmented Generation (RAG) mechanism, employs multi-stage prompt engineering strategies to guide code generation, and integrates a three-layer verification mechanism comprising static analysis, dynamic simulation, and expert review to ensure code quality. Experiments on the constructed PLC-MultiTask dataset demonstrate that our method significantly outperforms existing approaches across multiple metrics, achieving 90.3% compilation success rate, 87.6% test pass rate, and 75.4 CodeBLEU score. In an industrial case study involving robotic arm handling of refractory bricks, the system successfully generated approximately 800 lines of structured text code. Field testing over 720 hours demonstrated stable operation with 99.2% handling success rate, reducing development time by 73.3% compared to traditional methods. These results indicate that multi-agent-based PLC code generation significantly enhances development efficiency, ensures code quality, and strengthens cross-platform adaptation capabilities, offering a novel paradigm for industrial automation software development.

In software development, the user interface(UI) design process involves the part from an imagination that begins on a piece of paper where designers share thoughts to the final prototype that is ready to implement. UI designers use a technique of paper prototyping in low-fidelity sketches to implement the conceptual design. Once a design is drawn, it is usually captured within a photograph, then converted to a high-level mockup, and manually translated into a working client-side code by developers. The process consumes considerable effort and also delays the design process. Recently, researchers attempted to recreate UI from their sketches using code generation techniques. In this paper, we present a system for automatic code generation that combines recent advances in computer vision and deep learning for translating a sketched wireframe into a UI skeleton code. The proposed system has two main components: component recognition and code generation. The component recognition learns to extract visual features and their spatial layouts from sketched UI images. The code generator creates the equivalent UI skeleton codes based on the information from the detection model. A layout algorithm has been developed to resolve the overlapping of components and structure the layout. The evaluation result of the component recognition model indicates that the Faster R-CNN with Inception ResNet v2 backbone model achieved a mean average precision (mAP) of 95.5 %, among the other trained models. To evaluate the generator, we conducted a user study based on visual similarities between input image and the rendered UI.

Brian 2 is a fundamental rewrite of the Brian [1,2] simulator for spiking neural networks. Brian is written in the Python programming language and focuses on simplicity and extensibility: neuronal models can be described using mathematical formulae (differential equations) and with the use of physical units. Depending on the model equations, several integration methods are available, ranging from exact integration for linear differential equations to numerical integration for arbitrarily complex equations. The same formalism can also be used to specify synaptic models, allowing the user to easily define complex synapse models. Brian 2 keeps most of the syntax and functionality consistent with previous versions of Brian, but achieves more consistency and modularity as well as adding new features such as a simpler and more general new formulation of refractoriness. A consistent interface centered around human-readable descriptions using mathematical notation allows the specification of neuronal models (including complex reset, threshold and refractory conditions), synaptic models (including complex plasticity rules) and synaptic connections. Every aspect of Brian 2 has been designed with extensibility and adaptability in mind, which, for example, makes it straightforward to implement new numerical integration methods. Even though Brian 2 benefits from the ease of use and the flexibility of the Python programming language, its performance is not limited by the speed of Python: At the core of the simulation machinery Brian 2 makes use of fully automated runtime code generation [3], allowing the same model to be run in the Python interpreter, in compiled C++ code or on a GPU using CUDA libraries[4]. The code generation system is designed to be extensible to new target languages and its output can also be used on its own: for situations where high performance is necessary and/or where a Python interpreter is not available (for example for robotics applications), Brian 2 offers tools to assist in assembling the generated code into a stand-alone version that runs independently of Brian or a Python interpreter. To ensure the correctness and maintainability of the software, Brian 2 includes an extensive, full coverage test suite. Debugging of simulation scripts is supported by a configurable logging system, allowing simple monitoring of the internal details of the simulation process. Brian is made available under a free software license and all development takes place in public code repositories [5].

Dynamic code generation is the creation of executable code at runtime. Such "on-the-fly" code generation is a powerful technique, enabling applications to use runtime information to improve performance by up to an order of magnitude [4, 8,20, 22, 23].Unfortunately, previous general-purpose dynamic code generation systems have been either inefficient or non-portable. We present VCODE, a retargetable, extensible, very fast dynamic code generation system. An important feature of VCODE is that it generates machine code "in-place" without the use of intermediate data structures. Eliminating the need to construct and consume an intermediate representation at runtime makes VCODE both efficient and extensible. VCODE dynamically generates code at an approximate cost of six to ten instructions per generated instruction, making it over an order of magnitude faster than the most efficient general-purpose code generation system in the literature [10].Dynamic code generation is relatively well known within the compiler community. However, due in large part to the lack of a publicly available dynamic code generation system, it has remained a curiosity rather than a widely used technique. A practical contribution of this work is the free, unrestricted distribution of the VCODE system, which currently runs on the MIPS, SPARC, and Alpha architectures.

This paper is devoted to the development of the State Machine Generator system meant for automatic code generation based on the principles of automata-based programming. This system models program logic in terms of the finite-state automaton transition graph and generates program code on its basis. Basic functions of the developed software system and the mechanism of their implementation are described. This paper also proposes a new pattern for designing automaton programs. As an example, State Machine Generator is used to develop a bug tracker system for software testing.

ABSTRACTThis paper presents a framework for an automatic classification of product shape information aimed for design retrieval and know-how transfer in the design-by-feature using Automated Feature Recognition (AFR) approach. The proposed rule-based method uses an extendable well-known coding system, so called Opitz Coding System applied in Computer Aided Manufacturing (CAM) for grouping part families. The proposed method applies the advantages of know-how transfer between two distinct phases of product development, i.e. CAD and CAM. Many researches already aimed to efficiently integrate computer aided design, analysis and manufacturing for optimizing concepts such as product life cycle and computer aided process planning. However, most of these researches focus on optimization of the downstream process, i.e. from the low-level entities of CAD such as line and points to the high-level manufacturing entities such as chamfers or threads. On the contrary, this paper introduces a new approach for design opti...

This paper describes an interactive system for prg ram specification and generation.It consists of 1) a methodology for program generation and 2) a special purpose object-oriented database management system(OODBMS).The methodology is based on the object- oriented paradigm and consists of a set of program component classes and the rules for using these classes.The methods defined within the classes are available to the program developer for creating and relating program component objects, as well as generating source programs from the program components.The 00DBMS is made up of a user interface, a method interpreter called the generation engine and the object management system.

In contrast to standard compilers, generating code for DSPs can afford spending considerable resources in time and space on optimizations. Generating efficient code for irregular architectures requires an integrated method that optimizes simultaneously for instruction selection, instruction scheduling, and register allocation.We describe a method for fully integrated optimal code generation based on dynamic programming. We introduce the concept of residence classes and space profiles, which allows us to describe and optimize for irregular register and memory structures. In order to obtain a retargetable framework we introduce a structured architecture description language, ADML, which is based on XML. We implemented a prototype of such a retargetable system for optimal code generation. Results for variants of the TI C62x show that our method can produce optimal solutions to small but nontrivial problem instances with a reasonable amount of time and space.

In contrast to standard compilers, generating code for DSPs can afford spending considerable resources in time and space on optimizations. Generating efficient code for irregular architectures requires an integrated method that optimizes simultaneously for instruction selection, instruction scheduling, and register allocation.We describe a method for fully integrated optimal code generation based on dynamic programming. We introduce the concept of residence classes and space profiles , which allows us to describe and optimize for irregular register and memory structures. In order to obtain a retargetable framework we introduce a structured architecture description language, ADML, which is based on XML. We implemented a prototype of such a retargetable system for optimal code generation. Results for variants of the TI C62x show that our method can produce optimal solutions to small but nontrivial problem instances with a reasonable amount of time and space.

We performed a simulation of optical code generation and processing to determine the number of discriminable codes, which depends on the number of chips and the chip rate. Based on an actual optical binary phase shift keying (BPSK) code generation and processing system, the characteristics of devices in the code generation and processing with threshold processing were considered in this simulation. To handle variable BPSK codes, we used LiNbO3 (LN) modulators as an optical code generator and a transversal filter (TVF) as an optical code processor. We found that BPSK codes with 2-6 chips, 10, 20, 40Gchip/s had sufficient threshold margins for code discrimination in the simulation, and this result was in good agreement with experimental results. We performed experiments 4 chip, 10Gchip/s code generation and processing, and we experimentally confirmed the number of discriminable codes is 8.

Dynamic code generation is the creation of executable code at runtime. Such on-the-fly code generation is a powerful technique, enabling applications to use runtime information to improve performance by up to an order of magnitude [4, 8,20, 22, 23].Unfortunately, previous general-purpose dynamic code generation systems have been either inefficient or non-portable. We present VCODE, a retargetable, extensible, very fast dynamic code generation system. An important feature of VCODE is that it generates machine code in-place without the use of intermediate data structures. Eliminating the need to construct and consume an intermediate representation at runtime makes VCODE both efficient and extensible. VCODE dynamically generates code at an approximate cost of six to ten instructions per generated instruction, making it over an order of magnitude faster than the most efficient general-purpose code generation system in the literature [10].Dynamic code generation is relatively well known within the compiler community. However, due in large part to the lack of a publicly available dynamic code generation system, it has remained a curiosity rather than a widely used technique. A practical contribution of this work is the free, unrestricted distribution of the VCODE system, which currently runs on the MIPS, SPARC, and Alpha architectures.

In growing extent the functionality of technical systems is determined by software. This functionality, however, is spread over several distributed electronic control units (ECUs). Design and development of the software is done simultaneously with that of the technical system and the controller hardware. Therefore the complete system, consisting of mechanics, electronics and software, is first modelled in a simulation. In a next step, C-code for the ECUs is generated from the models. Code generation is supported by a tailored API to the runtime environment; this covers the complete controller hardware and the communication. Compared with a conventional development process, simulation-based development avoids implementation errors, enables an early behavior check and delivers an actual documentation-the Simulink model. Results of the code generation process and system evaluation are detailed for a DC/DC converter connecting a traction battery to a DC-link in a series hybrid drivetrain.