High-Performance Residue Arithmetic Based Elliptic Curve Cryptosystem Over GF(p) for Hardware Security

Abstract

AbstractHardware security is an inevitable one in embedded portable devices. Hardware uniqueness is the key advantage of hardware-based security and a viable alternative to software security. In this paper, residue arithmetic circuits are used to design the point operations in Elliptic Curve Cryptography (ECC) over Galois Field GF (p). Point Multiplication operations in ECC over GF(p) using signed residue arithmetic architectures are developed. A Verilog HDL code is used to model the entire ECC architecture and implemented in Zynq FPGA (XC7Z020CLG484-1) for Proof of Concept (PoC) using TSMC 180 nm, 90 nm and 45 nm standard cell libraries. The ASIC synthesis results, Proposed ECC Point multiplication architectures save the chip area by 7%, improve the operation speed by 17% and PDP savings of 15% compared with direct implementation of point multiplication. Key generation, Encryption, and Decryption operations are done using ECC over GF(p), which shows evidence that this system can secure embedded portable devices.KeywordsElliptic Curve Cryptography (ECC)GF(p)Hardware securityResidue arithmeticFPGAASIC