Abstract

High-performance poly-Sio,,Geo.3 gate PMOST and NMOST, compatible with conventional CMOS processing, are manufactured for devices with Le# down to 0.15pm. For PMOST we observe a -20% increase in saturation current and improved subthreshold slope from XlmV/dec to 75mV/dec wile off-state currents and short-channel effects are comparable to conventional devices. No influence of poly-Si,,Ge,, on the performance of NMOS transistors gates is observed. Introduction In deep submicron MOS transistors high substrate doping levels are needed to avoid short-channel effects and subthreshold leakage. This results in a decreased cader mobility and hence lower current drivability (ID?? of the devices. The situation can only be partly improved by changing channel profile (super-steep retrograde orground plane channel designs) to reduce the channel dopant concentration. This cannot solve, however, the problem of high subthreshold currents due to low threshold voltage (VT). An alternative approach is based on the gate workfmction change. The change of the gate-to-semiconductor workfmction difference ACP,, allows one to reduce uniformly the surface channel doping while retaining the V, at the same level as for poly-Si gate. The resulting decrease in the effective transverse electric field towards the Si-SiO, interface as well as removal of the scattering centres from the channel leads to a higher carrier mobility and an increase of t h e I ~ ~ % Reduction in the channel doping level also improves the Ior/loff ratio since the subthreshold swing decreases with depletion layer capacitance. Additionally, the body-factor K goes down a property which can be utilised in low-voltage CMOS applications to prevent the threshold voltage variations with the substrate potential. Recently, polycrystalline silicon-germanium alloy (hereafter referred to as poly-SiGe) has been suggested as a promising material for a singlep-type gate CMOS process [l] and has also been studied for deep submicron NMOST [2]. The poly-SiGe films are compatible with standard CMOS processing, they provide comparable nand better p-type dopants activation and, most importantly, an increase in Ge mole fraction induces a significant decrease in thep-type poly-SiGe workfunction [l]. However there have not been reported any results for deep submicron PMOS and NMOS devices. We present here a comparative study of deep submicron PMOST devices fabricated in a conventional way (with polySi gate) and with poly-Si,,,Ge,, as a gate material. We show that a substitution of poly-Si,,Ge,, for poly-Si leaves the main processing steps unchanged while it delivers a -20% increase in IDS~~ and improves the subthreshold slope S from 8lmVIdec to 75mV/dec with off-state currents and shortchannel effects at a comparable level. The body factorK decreases by more than 25% for submicron devices. At the Fig. 1 (a) Channel doping profiles used in this study as simulated by TMASUPREM-3; default As V, implant is 2.5~10'~@70keV, V$1 x 1012@70keV, V$0.7~10'~@50keV. (b) the effective transverse electric field towards the Si-SiO, interface as calculated on the basis of profiles in (a) with 1 .SV applied to ap-type gate. t Fig. 2 Flat-band voltage vs. tOx for poly-S&.,@e,, capacitors. AOMS is determined attox = 0. The thinnest gate oxide sample with poly-Si gate exhibit boron penetration which is not observed for poly-Si0,,Ge,, sample.

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