Abstract
A novel time-difference amplifier (TDA) is presented. The proposed circuit has a larger linear operation region with less sensitivity to process variations than the state-of-the-art TDAs. Two TDAs with gains of two and 20 have been simulated in a 65 nm CMOS process to validate the proposed architecture. Simulation results show less than 0.1% gain error for ±400 ps input time difference range, ten times the range of conventional TDAs. The proposed TDA consumes 740 μW from a 1 V supply.
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