Highly integrated thermoelectric coolers

Abstract

Thermoelectric coolers (TECs) are an effective technology for managing heat loads in high-performance electronic components. While most TECs are fabricated using bulk thermoelectric (TE) materials, thin-film thermoelectrics have been shown to be a viable alternative. Thin-film TE coolers (TFTECs) have several advantages in comparison with bulk devices, such as reduced form factor and improved heat pumping. However, the current TFTEC fabrication process does not take full advantage of the thin-film nature of the TE materials—the individual TE couples are fabricated as stand-alone subcomponents one die at a time. We report on a novel wafer-scale TFTEC fabrication process that is expected to improve the performance of TFTECs and enable their integration with other semiconductor devices. This highly integrated thermoelectric cooler (HITEC) approach is based on the same design methodology that is employed in silicon CMOS integrated circuits. By taking advantage of wafer-level processes, HITEC is scalable to larger device sizes and and higher manufacturing volumes. Furthermore, HITEC reduces the number of layers and interfaces in TFTECs, which minimizes thermal parasitic losses. Thus the HITEC approach enables improvements in TFTEC's scalability, cost, and performance.