High resolution defect inspection of step and flash imprint lithography for 32 nm half-pitch patterning

Abstract

Imprint lithography has been shown to be an effective method for the replication of nanometer-scale structures from an imprint mask (template) or mold. Step and Flash Imprint Lithography (S-FIL®) is unique in its ability to address both resolution and alignment. Recently overlay across a 200 mm wafer of less than 20nm, 3σ has been demonstrated. Current S-FIL resolution and alignment performance motivates the consideration of nano-imprint lithography as a Next Generation Lithography (NGL) solution for IC production. During the S-FIL process, a transferable image, an imprint, is produced by mechanically molding a liquid UV-curable resist on a wafer. Acceptance of imprint lithography for CMOS manufacturing will require demonstration that it can attain defect levels commensurate with the requirements of cost-effective device production. This report summarizes the result of defect inspections of wafers patterned using S-FIL. Wafer inspections were performed with KLA Tencor- 2132 (KT-2132) and KLA Tencor eS23 (KT-eS32) automated patterned wafer inspection tools. Imprint specific defectivity was shown to be ≤3 cm^-2 with some wafers having defectivity of less than 1 cm^-2 and many fields having 0 imprint specific defects, as measured with the KT-2132. KT eS32 inspection of 32 nm half pitch features indicated that the random defectivity resulting from the imprint process was low.