https://doi.org/10.1109/tvlsi.2025.3590597

High-Precision Low-Latency Method and Architecture for Computing Binary and Decimal Logarithms

Nov 1, 2025
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hui Chen +3 more

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High-Precision Low-Latency Method and Architecture for Computing Binary and Decimal Logarithms

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