Abstract
This article presents the high-level design of general multi-stage noise band cancellation (MSNBC) $$\Upsigma\Updelta$$ Σ Δ analog-to-digital converters (ADC). The MSNBC architecture enables to extend the conversion bandwidth of a primary modulator and to provide high resolution conversion. Moreover, this architecture should offer a low power consumption. This type of ADC is very useful for wideband and high resolution application such as the digitization of data for the linearization of base station (BTS) power amplifiers. This article introduces the MSNBC architecture and provides a methodology for the high-level design of such ADC for both discrete-time and continuous-time implementation. The methodology enables the design of stable and high resolution modulators and, the direct synthesis of digital FIR filters that are used for noise cancellation. This methodology is fast and useful to design high performance MSNBC $$\Upsigma\Updelta$$ Σ Δ ADC.
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