Abstract
AbstractThis paper discusses the high‐frequency equilibrium‐state capacitance–voltage (C–V) characteristics of a buried‐channel MOS capacitor, that is, a MOS capacitor with a thin p‐type layer at the surface of an n‐type Si substrate. For this device, changing the gate voltage in the negative direction converts the surface p‐type layer from a depletion region into an accumulation region (an inversion region for the n‐type substrate). The high‐frequency characteristics reveal that the capacitance first decreases to a minimum and then saturates after a slight increase. The author discusses the underlying physics of this capacitance minimum, which is a peculiar characteristic of buried‐channel MOS capacitors, based on the general relation between the high‐frequency capacitance and the depletion layer width. The discussion suggests that the origin of this effect is an ac component of the density distribution of holes that follows the high‐frequency signal, even when the total number of holes is unable to track the same signal. © 2004 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 87(4): 25–33, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10081
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