High density SDRAM package solution for next generation product board applications

Abstract

The revolution in performance driven electronic systems continues to challenge the IC packaging industry. The challenge is clear. To ensure that the memory functions are able to support the increased signal speed, product developers will need to explore more innovative package assembly techniques and process refinement methodologies. The methodology selected for package assembly, however, must consider process complexity, costs associated with each process, package assembly yield, performance and end product reliability. In this paper the authors will introduce the xFD package technology, an innovative and very thin dual and quad facedown die stacking solution specifically developed by Invensas for the center-bond pad DDR3 and DDR4 SDRAM die. The package assembly methodology promises to remain economical because it requires no special die level process steps and it will utilize the existing package assembly infrastructure. Additionally, data compiled during extensive performance and reliability modeling and the results from actual physical qualification testing will be presented.