Hardware Accelerated Broad Phase Collision Detection for Realtime Simulations

Abstract

Broad phase collision detection is a vital task in most interactive simulations, but it remains computationally expensive and is frequently an impediment to efficient implementation of realtime graphics applications. To overcome this hurdle, we propose a novel microarchitecture for performing broad phase collision detection using Axis-Aligned Bounding Boxes (AABBs), which exploits the parallelism available in the algorithms. We have implemented our microarchitecture on a Field-Programmable Gate Array (FPGA) and our results show that this implementation is capable of achieving an acceleration of up to 1.5× over the broad phase component of the SOLID collision detection library, when considering the communication overhead between the CPU and the FPGA. Our results further indicate that significantly higher accelerations are achievable using a more sophisticated FPGA or by implementing our microarchitecture on an Application-Specific Integrated Circuit (ASIC).