Abstract
An accurate model for junction field-effect transistors (JFETs) and for Schottky barrier field-effect transistors (MESFETs) with micron and submicron dimensions is presented. The following effects are modeled: distributed channel charge, electrostatic drain feedback, drift velocity saturation, channel length modulation, substrate bias effect, subthreshold region effect, short-length and narrow-width effects, drain-source punch-through, variable capacitance effects, and temperature effects. It is primarily physical rather than empirical and only one set of parameters is needed to simulate devices of a particular technology. The model is intended for silicon devices, but the extension to devices in semiconducting III–V compounds and with insulating substrates is straightforward. The model is compared to experimental data.
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