Grid integrated solar energy transfer system with a two‐layer complex coefficient filter‐based control

Abstract

In this paper, a novel control strategy for grid-integrated solar energy transfer system (SETS) is proposed which enhances the grid power quality along with active power injection. Some of the conventional grid synchronization controls face problems due to imperfect estimation of fundamental active load current during both grid-side and load-side disturbances. The proposed two-layer multiple-complex coefficient filter control improves the performance of SETS by accurately estimating the fundamental active load current at adverse operating conditions. One layer extracts the fundamental positive sequence of the sensed three-phase grid voltages and derives the unit in-phase voltage templates for grid currents reference generation to achieve unity power factor operation. The second layer evaluates the average active fundamental component of the load currents, and finally derives the reference amplitude of three-phase grid currents. The two-stage SETS consists of a quadratic boost DC-DC converter to extract the maximum solar array power forming an interface between PV array and inverter. It also provides high voltage gain and decreases the length of the PV array string while maintaining a low DC-link voltage ripple, extending the service life of the SETS. The effect of a nonlinear unbalanced load is nullified and therefore the grid current's waveform quality is maintained in compliance with the IEEE-519 standard during the dynamic operating conditions. The SETS provides sinusoidal, balanced, and steady grid currents at unity power factor withstanding adverse operating conditions such as distorted grid voltages, varying irradiance and varying unbalanced nonlinear load currents. Due to its flexibility to operate in such adverse conditions, the proposed control based SETS is suitable for grid-connected applications. Simulations are carried out in MATLAB/Simulink and results validate the performance of the SETS. The hardware prototype of the proposed SETS is developed and rigorously tested under various operating conditions to validate the proposed claims.