Abstract
This paper presents an approach to hierarchical design of state machine controllers from a high-level specification into PLA code suitable for VLSI. The idea is to use the Algorithmic State Machine (ASM) model as a basis for representing the state machine and performing state assignments in software. The algorithmic behavior of the controller is defined in block-structured form by means of a high-level design language. This descriptions are then compiled into state machine code via data structures. A PLA generation package is then used to produce state machine designs in silicon.
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