Abstract
In this work, we explore the gate oxide thickness influence on the Gate Induced Floating Body effect (GIFBE). This study was performed through two-dimensional numerical simulations and electrical measurements. The available devices are from 130nm and 65nm Silicon-On-Insulator (SOI) MOSFET technologies. The GIFBE and threshold voltage are evaluated as function of the gate oxide thickness reduction and an overlap tendency of the first and the second transconductance peaks is observed.
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