GaAs-based metal-insulator-semiconductor structures with low interface traps using molecular beam epitaxy and chemical vapor deposition

Abstract

The performance of GaAs-based field-effect transistors (FETs) in switching and power applications can be enhanced substantially by employing a metal-insulator-semiconductor (MIS) structure. Attempts thus far have fallen short due to large interface trap concentrations, frequency dispersion, and hysteresis. By taking advantage of an in-situ process approach, we successfully gated insulator — GaAs structures with excellent interfacial properties. The structures utilize a Si interface layer or a composite Si/Ge layer grown on GaAs followed by a Si 3N 4 dielectric layer, all using a III–V molecular beam epitaxy (MBE) system connected by an ultrahigh vacuum transfer tube to an adjacent electron cyclotron resonance (ECR) plasma enhanced chemical vapor deposition (CVD) system. This pseudo-in-situ feature in concert with recently implemented vacuum connected scanning tunneling microscopy (STM) and X-ray photoelectron spectroscopy (XPS) allows investigations of the essential interface layers. High/low frequency capacitance-voltage, conductance versus frequency, and metal-insulator-semiconductor field-effect transistors (MISFETs) were used for a comprehensive characterization of the n-type MIS structures. From the stringent conductance measurements, interface state densities in the high 10 10 eV −1 cm −2 have been obtained. The hysteresis is about 150 mV for a field swing of +4 to −4 MV/cm. The frequency dispersion is nearly zero except near inversion where its value is about 100 mV. Self aligned gate depletion mode MISFETs having 3 μm gate lengths exhibited transconductances of 169 mS/mm for the pseudomorphic InGaAs channels and about 100–140 mS/mm for GaAs channels.