FTNoCSim: A new Simulation platform for Evaluating Network-on-Chip Reliability

Abstract

Network on chip (NoC) design gained a lot of attention in recent years, this is due to the performance provided by this new System-on-Chip (SoC) interconnect paradigm. Several research issues related to $N$ oC design are addressed. Therefore, developing simulators and tools for evaluating NoC performance, has become of paramount importance. Reliability, is one of the most important and critical features that must be considered by network on chip designers in the early stages of design. In this paper, we present a new platform named FTNoCSim, based on OMNeT++ framework. Its architecture is designed to make easier the implementation and the evaluation of innovative fault tolerance techniques for three layers of the NoC OSI model: data link, network and transport layers. FTNoCSim users can explore basic concepts of NoC or assess their designs in terms of reliability, latency and power consumption. The later is achieved by integrating Orion power model. Experiments have been conducted to test and validate our simulation, tending to prove the efficiency of our platform.