Abstract
Lithography as developed for IC device fabrication is a high volume high accuracy patterning technology with strong 2 dimensional (2D) characteristics. This 2D nature makes it a challenge to integrate this technology in a 3 dimensional (3D) manufacturing environment. This article addresses the performance of a waferstepper (ASML PAS5000) in several 3D processes ranging form waferbonding and thinning to dual side processing with through silicon vias (TSV). Four different generic expose/etch strategies are discussed to fabricate vertical micro sieves, vertical through wafer silicon plate springs, dual side interconnect with TSV and vertical electrodes in deep silicon channels. It is concluded, that despite the 2D nature of advanced waferstepper lithography a wide range of 3D structures can be fabricated. The multi point alignment capabilities of a waferstepper can improve the overlay in several 3D manufacturing processes and the high accuracy alignment system can be used as a metrology tool for further development of 3D integration processes.
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