Four-Quadrant CMOS Analog Current Multiplier Using Frequency Compensation and 1.5 V Supply

Abstract

This work presents two new CMOS designs of current mode squarer circuits using a 1.5 V supply. The four-quadrant multiplier has also been designed using proposed squarer circuits. To improve bandwidth, the resistive compensation scheme has been exploited. The input and output signals of proposed circuits are of current type and hence exhibit larger dynamic range contrary to voltage mode circuits. Various simulations have been carried out to check performance and validate theoretical analysis. It is observed that range of − 3 dB bandwidth, power consumption and linearity error of the proposed circuits I and II are 542.53 MHz and 1.13 GHz, 0.56 and 0.47 mW and 1.8 and 2%, respectively. In the state of the art, it is noticed that around 10–90% bandwidth is increased while using proposed circuits over most of the conventional circuits. All results are verified using spice tools and 0.18 µm CMOS technology parameters.