Flight Qualification and Circuit Development of Sensor Front-End Electronics for PACS/Hershel at Liquid Helium Temperature

Abstract

In the framework of the development of the European Space Agency's Herschel Space Observatory (HSO), IMEC designed the cold-readout electronics (CRE) for the PACS instrument. Key specifications for this circuit were high linearity, low power consumption, high uniformity, and very low noise at an operating temperature of 4.2K (liquid helium temperature, LHT). To ensure high production yields and uniformity, relatively easy availability of the technology, and portability of the design, the circuit was implemented in a standard CMOS technology. The circuits are functional at room temperature, which allows screening prior to integration and qualification and has an important impact on the production yield and time. The circuit was mounted on an Al2O3 substrate for optimum electrical performance. On the same substrate, bias signal generation, short-circuit protection circuitry, and decoupling capacitors for the power lines were integrated. This led to a relatively complex substrate containing over 30 passives and one die, integrated by means of conducting and nonconducting glue and nearly 80 wire bonds. Because the detector arrays will be cooled down to 4.2K prior to launch, reliability and launch-survivability of the mounted substrate at this temperature and in this harsh environment had to be demonstrated. For this purpose, the quality and associated reliability of every assembly step is verified during substrate mounting. This included verification of the compatibility of the bond material, optimization of the bond yield, and temperature cycling (between room temperature and LHT) of the devices. Other tests on qualification models would focus on circuit functionality under proton and gamma irradiation, cryogenic vibration tests to demonstrate launch survivability, and exhaustive temperature cycling to qualify the assembly procedure. We present in this paper the complete integration and qualification of the developed circuits, including assembly and verification during production of the flight models and qualification of the assembly method on the qualification models.