Abstract
This paper presents a single-ended 12-transistor SRAM cell capable of operating at near-threshold voltage in FinFET technology. This cell employs Schmitt trigger-based inverters and feedback cut write assist technique to improve performance properties. The simulations have been done through HSPICE using 10 nm FinFET technology at a supply voltage of 0.45 V and a temperature of 25°C under 5000 Monte Carlo tests. The proposed cell improves the read static noise margin by at least 1.01 times. The write static noise margin is also increased by at least 1.07. The proposed single-ended cell leads to a reduction of α BL by 50% and offers low dynamic write power. The leakage power is also reduced by 1.03 times due to the use of single bitline in the cell structure, stack transistors in the write path and elimination of leakage in the read path.
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