Abstract
In the field of digital signal and image processing the Fast Fourier Transform (FFT) is one of the rudimentary operations. Telecommunication, Automotive, Hearing devices, Voice recognition systems are some of the applications of Fast Fourier Transform. DFT is implemented using FFT which is a type of algorithm that computes DFT in a fast and efficient manner. This project concentrates on the development of the Fast Fourier Transform (FFT), based on Decimation In Time (DIT) domain, Radix2 algorithm, using VHDL as a design entity.The objective of this project is to establish an efficient design that computes FFT in a faster way. In this project FFT is implemented using modified booth multiplier and CLA and simulated on Xilinx ISE. K
Highlights
A huge number of digital data has to be processed at extreme speed in many applications of DSP
The Fast Fourier Transform [7] works on the radix-2 algorithm which is often denoted as butterfly module
This equation requires a greater number of additions and multiplications which makes the Discrete Fourier Transform (DFT) a little complex algorithm
Summary
A huge number of digital data has to be processed at extreme speed in many applications of DSP. Convolution in DSP the multiplier plays an important role. Applications like the Discrete Fourier Transform (DFT) is one of the most utilized tools in DSP. It is used for analyzing and designing systems in the frequency domain. It literally halves the number of computations and increases the speed of the system especially when the input is of long data set.
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