Abstract
We study the testability of analog circuits in the frequency domain by introducing the analog fault observability concept. The proposed algorithm indicates the set of adequate test frequencies and test nodes to increase fault observability. This approach combines a structural testing methodology with functionality verification to increase the test effectiveness and consequently the design manufacturability and reliability. We analyze the case of single fault, double, and multiple faults. Concepts such as fault masking, fault dominance, fault equivalence, and non observable fault in analog circuits are defined and then used to evaluate testability. The theoretical aspect is based on the sensitivity approach.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
