Fabrication of complete 8 in. stencil mask for electron projection lithography

Abstract

We fabricated an 8 in. stencil mask having the complementary pattern of the 70 nm rule system-on-chip device. The 8 in. stencil mask was realized from the development of a mask substrate fabricated by using the sputtering method to form a scattering silicon membrane and an intermediate stopper layer. The intermediate layer material, which functions as an etching stopper, was CrNx. This material has demonstrated high performance in stencil mask fabrication, which is described in detail. The stress in the CrNx could be controlled within ±20 MPa by adjusting the deposition condition. The deposited silicon membrane stress could be easily adjusted in the range of 0–10 MPa. The etching selectivity, when the substrate backside etching was performed, was over 1000 under the low bias power. When the deep etching process was performed using SF6 and CHF3 etching gases for the mask pattern formation, the Si/CrNx etching selectivity was over 100 under the low bias power condition. The mask substrate, which is made up of a 2-μm-thick deposited silicon membrane and 0.35-μm-thick CrNx stopper layer, enabled an 8 in. stencil mask to be fabricated for use with electron projection lithography. In complementary mask split, we used “M-Split” which was developed by Selete and ISS as a pattern split software.