Abstract
Dielectric isolation of silicon on insulator (SOI) technology allows circuits to be designed that have reduced single event upset effects and are free from latch-up. For these reasons, SOI technologies are well suited for space applications. In this paper, we investigated both single event upset (SEU) and single event latch-up (SEL) effects of 512k bits SRAMs fabricated in SOI technology. The linear energy transfer (LET) of heavy ions used in the radiation experiment range from 32.4 to 99.8MeV-cm2 /mg. It is shown that devices fabricated in SOI technology which are radiation hardened through advanced and proprietary design, layout and process hardening techniques should exhibit high SEU levels(above 63.7MeV-cm2/mg). Besides, the devices are SEL immune.
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